1. Field of the Invention
This invention relates to phase locked loop systems, and more particularly to means for providing signals between a phase detector and a variable oscillator of the phase locked loop system.
2. Description of the Prior Art
Basically a phase locked loop is a frequency feedback system comprised of a phase detector, a loop filter and a variable oscillator in the feedback path. A well-known type of phase detector is what is known as a lead-lag type. If a constant-frequency external input signal is applied to an input terminal of the phase detector, with the input signal from the variable oscillator being also applied to another input terminal of the phase detector, the phase detector compares the phase and frequency of the input signal with the signal of the variable oscillator and generates a voltage during the period of lag, if the variable oscillator signal lags the reference signal, and generates a voltage during the period of lead, if the oscillator signal leads the reference signal. Such devices are discussed in THE ART OF ELECTRONICS, authored by Paul Horowitz and Winfield Hill, first published 1980, at pages 429-430 thereof. The error voltage is then filtered and applied to the control lead of the variable oscillator thereby varying the oscillator frequency in a direction that reduces the frequency difference between the two signals. When the frequencies of the two signals become sufficiently close, the feedback nature of the system causes the system to lock with the input signal, and the phase detector provides no signal output at all.
In the common design of such a device, the filter includes a resistor and capacitor in series, with the resistor connected to the input lead of the oscillator. The inclusion of such a resistor results in a larger device size than would be necessary if such a resistor could be deleted. In addition to that problem, when using such a resistor, device parameters such as band width and stability are more difficult to control. Furthermore, standard CMOS resistors have a wide tolerance which precludes them from use in typical phase locked loop implementations. Alternatively, using an external resistor introduces a significant noise source and requires the switched currents to be increased to compensate for the large parasitic capacitance inherit in package pins. This increases power dissipation and requires a large filter capacitance.